FP7 FET-Open success for Dr Emanuel Popovici, EEE

The Embedded Systems Group led by Dr. Emanuel Popovici is part of a new European consortium "i-RISC: innovative solutions for reliable circuit design from low-powered unreliable components", targeting a breakthrough innovation in the field of ultra low power fault-tolerant chip design.

One of the most critical challenges for the next-generation electronic circuit design is the nanoscale integration of chips built of unreliable components. The design of storage, interconnect, and processing elements will require completely new approaches, which are inconceivable without the use of powerful fault tolerant techniques.

The i-RISC (Innovative Reliable Chip Designs from Unreliable Components) project brings together six academic partners: Commissariat à l’Energie Atomique et aux Energies Alternatives (CEA, France, project coordinator), University College Cork, (UCC, Ireland), Ecole Nationale Supérieure de l’Electronique et de ses Applications (ENSEA, France), Technische Universiteit Delft (TUD, The Netherlands), Universitatea Politehnica Timisoara (UPT, Romania), and University of Nis (ELFAK, Serbia).

In an era when the transistor functional model becomes probabilistic, it is a great opportunity and a big challenge to expand the logic theory with the latest concepts in communications towards achieving a Boole-Shannon limit for future generation digital integrated circuits.

For more information, contact e.popovici@ucc.ie