Liam Marnane received the B.E. degree in electrical engineering from University College Cork in 1984 and the D.Phil degree from University of Oxford in 1989 studying test vector generation and design for test of VLSI designs. He was a lecturer in VLSI design at the School of Electronic Engineering Science, University of Wales, Bangor from 1989 to 1993. In 1992 he was a Visiting Researcher and Marie Cure Fellow at the Institute de Recherche en Informatique et Systemes Aleatoires, at the University of Rennes, France. In 1993 he was appointed as lecturer in Digital Signal Processing in the Department of Electrical & Electronic Engineering at University College Cork and as senior lecturer in 1999. In 1999 he was a visiting researcher to the Electronic Devices Research Group, Department of Physics, University of Linköping. He has been awarded the "Giner de Los Ríos" Visiting Research Fellowship of the University of Alcalá, Madrid, Spain, for 2007. His research interests includeBiomedical Signal Processing and digital design for DSP, coding and cryptography. He is a member of the IEEE.
- Doyle, O.M., Korotchikova, I., Lightbody, G., Marnane. W.P., Kerins, D. and Boylan, G.B., “Heart rate variability during sleep in healthy term newborns in the early postnatal period”, Physiological Measurement, Vol. 30, No. 8, pp. 847-860, August 2009. http://stacks.iop.org/0967-3334/30/847
- Greene, B.R., Marnane, W.P., Lightbody, Reilly, R.B. and Boylan, G.B. “Classifier models and architectures for EEG based neonatal seizure detection”, Physiological Measurement, Vol. 29, No. 10, pp. 1157-1178, October 2008.
- Greene, B.R., Faul, S., Marnane, W.P., Lightbody, G., Korotchikova, I. and Boylan, G.B. “A comparison of quantitative EEG features for Neonatal Seizure Detection”, Clinical Neurophysiology Vol. 119, No. 6, pp. 1248-1261, June 2008.
- Faul, S., Gregorcic, G., Boylan, G.B., Connolly, S., Marnane, W.P. and Lightbody, G., “Gaussian Process Modelling of the Neonatal EEG for the Detection of Seizures”, IEEE Transactions on Biomedical Engineering, Vol. 54, No.12, pp. 2151 – 2162, December 2007.
- Keller, M., and Marnane, W.P., “Low Energy ASIC Elliptic Curve Processor”, Journal of Low Power Electronics, Vol. 2, No. 1, pp. 85-95, April 2009.
- McEvoy, R.P., Tunstall, M., Murphy, C.C., and Marnane, W.P., “Isolated WDDL: A Hiding Countermeasure for Differential Power Analysis on FPGAs” accepted for publication ACM Transactions on Reconfigurable Technology and Systems, Vol. 2, No. 1, Article 3, March 2009.
- Keller, M., Byrne, A. and Marnane, W.P., “Elliptic Curve Cryptography on FPGA for Low Power Applications”, ACM Transactions on Reconfigurable Technology and Systems, Vol. 2, No. 1, Article 2, March 2009.
- Byrne, A., Popovici, E.M. and Marnane, W.P., “Versatile Processor For GF(pm) Arithmetic for use in Cryptographic Applications”, IET Proceedings: Computers and Digital Techniques, Vol. 2, No. 4, pp. 253-264, July 2008.
- Byrne, A., Meloni, N., Crowe, F., Tisserand, A., Popovici, E.M. and Marnane, W.P., “Comparison of Simple Power Analysis Attack Resistant Algorithms for an Elliptic Curve Cryptosystem”, Journal of Computers (JCP), Vol. 2, No. 10, pp.52-62, December 2007.