Baldwin, B. and Marnane, W.P., "An FPGA Technologies Area Examination of the SHA-3 Hash Candidate Implementations", Cryptology ePrint Archive, Report 2009/603, 2009


Baldwin, B., Marnane, W.P. and Granger, R., "Reconfigurable Hardware Implementation of Arithmetic Modulo Minimal Redundancy Cyclotomic Primes for ECC", 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Mexico, 09-11 December 2009.


Bailey, D.V.,  Baldwin, B., Batina, L., Bernstein, D.J., irkner, P., Bos, J.W., van Damme, G., Meulenaer, G., Fan, J., Güneysu, T., Gurkaynak, F., Kleinjung, T., Lange, T., Mentens, N., Paar, C., Regazzoni, F, Schwabe, P. and Uhsadel, L., "The Certicom Challenges ECC2-X", SHARCS'09 - Workshop on Special Purpose Hardware for Attacking Cryptographic Systems, Lausanne, Switzerland, September 09-10, 2009.


English, T., Keller, M.,  Man, K.L.,  Popovici, E., Schellekens, M. and Marnane, W.P. “A Low-power Pairing-based Cryptographic Accelerator for Embedded Security Applications”, 22nd IEEE International SOC Conference, Belfast, Northern Ireland, UK, September 9-11, 2009.


Baldwin, B., Byrne, A., Hamilton, M., Hanley, N., McEvoy, R.P., Pan, W. and Marnane, W.P., “FPGA Implementations of SHA-3 Candidates: CubeHash, Grøstl, LANE, Shabal and Spectral Hash”, 12th EUROMICRO Conference on Digital System Design (DSD2009), Patras, Greece, August 27-29,  2009.


Pan, W., Popovici, E., Lidholm, S. and Marnane, W.P., “ASIC Implementation of a Finite Field Arithmetic Processor Core”, IET Irish Signals and System Conference – ISSC 2009, June 2009.


Keller, M., and Marnane, W.P., “Low Energy ASIC Elliptic Curve Processor”, Journal of Low Power Electronics, Vol. 2, No. 1, pp. 85-95, April 2009.


McEvoy, R.P., Tunstall, M., Murphy, C.C., and Marnane, W.P., “Isolated WDDL: A Hiding Countermeasure for Differential Power Analysis on FPGAs” accepted for publication ACM Transactions on Reconfigurable Technology and Systems, Vol. 2, No. 1, Article 3, March 2009.


Keller, M., Byrne, A. and Marnane, W.P., “Elliptic Curve Cryptography on FPGA for Low Power Applications”, ACM Transactions on Reconfigurable Technology and Systems, Vol. 2, No. 1, Article 2, March 2009.


Baldwin, B., Moloney, R., Byrne, A., McGuire, G., Marnane, W.P., “A Hardware Analysis of Twisted Edwards Curves for an Elliptic Curve Cryptosystem”, Applied Reconfigurable Computing - ARC 2009, LNCS 5453, pp. 355–361, 2009. Springer-Verlag Berlin Heidelberg, March 16-18, 2009.



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