R. Bresnan, W. P. Marnane, and M. Sala. Efficient low-density parity-check decoding. In IEE Irish Signals and Systems Conference 2004, pages 613--618. IEE, June--July 2004.

 

F. Crowe, A. Daly, T. Kerins, and W. P. Marnane. Single-chip FPGA implementation of a cryptographic co-processor. In IEEE International Conference on Field-Programmable Technology, pages 279--285. IEEE, 2004.

 

F. Crowe, A. Daly, T. Kerins, and W. P. Marnane. Design of an efficient interface between an FPGA and external memory. In IEE Irish Signals and Systems Conference 2004, pages 118--123. IEE, June-July 2004.

 

A. Daly, W. P. Marnane, T. Kerins, and E. M. Popovici. An FPGA implementation of GF(p) ALU for encryption processors. Elsevier Journal on Microprocessors and Microsystems, Special Issue on FPGAs: Applications, Algorithms and Tools, 28(5--6):253--260, May-June 2004.

 

A. Daly, W. P. Marnane, T. Kerins, and E. M. Popovici. New Algorithms, Architectures and Applications for Reconfigurable Computing, chapter 18: Divison in GF(p) for Application in Elliptic Curve Cryptosystems on Field Programmable Logic, pages 219--229. Springer-Verlag, 2004.

 

T. Kerins, W. P. Marnane, and E. Popovici. Design for reuse elliptic curve cryptosystem processors for FPGAs. In IEE Irish Signals and Systems Conference 2004, pages 577--582. IEE, June-July 2004.

 

T. Kerins, E.M. Popovici, and W.P. Marnane. Fully paramaterisable galois field arithmetic processor over GF(3m) suitable for elliptic curve cryptography. In IEEE 24th International Conference on Microelectronics, volume 2, pages 739--742. IEEE, 2004.

 

T. Kerins, E. M. Popovici, and W. P. Marnane. Algorithms and architectures for use in FPGA implementations of identity based encryption schemes. In J. Becker, M. Platzner, and S. Vernalde, editors, Field-Programmable Logic and Applications --- FPL 2004, volume 3203 of Lecture Notes in Computer Science, pages 74--83. Springer-Verlag, 2004.

 

C. M. Lucey and C. C. Murphy. Generalising wavelet-based error correction coding via polyphase constraints. In WSEAS International Conference on Wavelet Analysis & Multirate Systems - WAMUS 2004. WSEAS, 2004.

 

G. Murphy, E. M. Popovici, R Bresnan, W. P. Marnane, and P. Fitzpatrick. Design and implementation of a parameterizable LDPC decoder IP core. In IEEE 24th International Conference on Microelectronics, volume 2, pages 747--750. IEEE, May 2004.

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