F. Crowe, A. Daly, T. Kerins, and W. P. Marnane. A reconfigurable TLS protocol processor. In Irish Signals and Systems Conference 2003, pages 256--361, June 2003.

 

F. Crowe and W. P. Marnane. Hardware acceleration of cryptographic ciphers used in the transport layer security (TLS) protocol. In Irish Telecommunications Systems Research Symposium 2003, May 2003.

 

A. Daly, W. P. Marnane, T. Kerins, and E.M. Popovici. Fast modular divison for application in ECC on reconfigurable logic. In P. Y. K. Cheung, G. A. Constantinides, and J. T. de Sousa, editors, Field-Programmable Logic and Applications --- FPL 2003, volume 2778 of Lecture Notes in Computer Science, pages 786-795. Springer--Verlag, 2003.

 

A. Daly, W. P. Marnane, and E. Popovici. Fast modular inversion in the montgomery domain on reconfigurable logic. In Irish Signals and Systems Conference 2003, pages 362--367, June 2003.

 

C. McIvor, M. McLoone, J. McCanny, A. Daly, and W. Marnane. Fast montgomery modular multiplication and RSA cryptographic processor architectures. In 37th Asilomar Conference on Signals, Systems, and Computers, volume 1, pages 379--384. IEEE, 2003.

 

G. Murphy, E. Popovici, and W. P. Marnane. Design trade-off for the implementation of LDPC encoders. In Irish Signals and Systems Conference 2003, pages 506--511, June 2003.

 

D. K. Singh, W. P. Marnane, and P. Fitzpatrick. Reconfigurability of turbo codes for differentiatied QOS. In Irish Signals and Systems Conference 2003, pages 542--547, June 2003.

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