Brian Baldwin

Name:

Brian Baldwin

Contact Details:

Position:

PhD Candidate

Category:

Research

Biography

Brian Baldwin received his B.Sc. degree in Electronic Engineering from Waterford IT in 2002 and the MEngSc in Microelectronics from University College Cork in 2007. He is currently a member of the Coding and Cryptography research group at UCC and the Claude Shannon Institute for Discrete Mathematics, Coding and Cryptography. He is currently working towards his PhD. degree under the supervision of Dr Liam Marnane. His primary research interests are hardware software co-design of elliptic curve cryptographic systems, and Hardware implementations of cryptographic functions.

FPGA Implementations of the Round Two SHA-3 Candidates
Brian Baldwin,Andrew Byrne, Liang Lu, Mark Hamilton, Neil Hanley, Maire O'Neill and William P. Marnane
20th International Conference on Field Programmable Logic and Applications -FPL 2010, August 31 - September 2 2010


FPGA Implementations of the Round Two SHA-3 Candidates
Brian Baldwin,Andrew Byrne, Liang Lu, Mark Hamilton, Neil Hanley, Maire O'Neill and William P. Marnane
The Second SHA-3 Candidate Conference. August 23-24, 2010
http://csrc.nist.gov/groups/ST/hash/sha-3/Round2/Aug2010/documents/Program_SHA3_Aug2010.pdf

A Hardware Wrapper for the SHA-3 Hash Algorithms
Brian Baldwin,Andrew Byrne, Liang Lu, Mark Hamilton, Neil Hanley, Maire O'Neill and William P. Marnane
21st Irish Signals and Systems Conference, ISSC 2010, 23rd - 24th June 2010
Cryptology ePrint Archive, Report 2010/124, 2010
http://eprint.iacr.org/2010/124

An FPGA Technologies Area Examination of the SHA-3 Hash Candidate Implementations
Brian Baldwin, William P. Marnane
Cryptology ePrint Archive, Report 2009/603, 2009
http://eprint.iacr.org/2009/603

Reconfigurable Hardware Implementation of Arithmetic Modulo Minimal Redundancy Cyclotomic Primes for ECC
Brian Baldwin, William P. Marnane and Robert Granger
Reconfigurable Computing, FPGAs, International Conference on, pages 255-260, 2009
http://www.computer.org/portal/web/csdl/doi/10.1109/ReConFig.2009.67

The Certicom Challenges ECC2-X
Daniel V. Bailey, Brian Baldwin, Lejla Batina, Daniel J. Bernstein, Gauthier Van Damme, Giacomo De Meulenaer, Junfeng Fan, Tim Güneysu, Frank Gurkaynak, Thorsten Kleinjung, Nele Mentens, Christof Paar, Francesco Regazzoni, Peter Schwabe and Leif Uhsadel
Workshop on Special Purpose Hardware for Attacking Cryptographic Systems (SHARCS'09), September 2009
http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.149.9778

FPGA Implementations of SHA-3 Candidates:CubeHash, Groestl, Lane, Shabal and Spectral Hash
Brian Baldwin, Andrew Byrne, Mark Hamilton, Neil Hanley,Robert P. McEvoy, Weibo Pan and William P. Marnane
Digital Systems Design, Euromicro Symposium on -DSD 2009, pages 783-790. 2009
http://www.computer.org/portal/web/csdl/doi/10.1109/DSD.2009.162

A Hardware Analysis of Twisted Edwards Curves for an Elliptic Curve Cryptosystem
Brian Baldwin, Richard Moloney, Andrew Byrne, Gary McGuire, William P. Marnane
Applied Reconfigurable Computing - ARC2009, to be published as a Springer Verlag LNCS series volume (Lecture Notes in Computer Science).
http://www.springerlink.com/content/567743897925212g/

Fault Injection Platform for Block Ciphers
Brian Baldwin, Emanuel M. Popovici, Michael Tunstall, William P. Marnane
IET Irish Signals and Systems Conference - ISSC 2008, pages 10–15. August 2008.
http://scitation.aip.org/getabs/servlet/GetabsServlet?prog=normal&id=IEECPS0020080CP539000010000001&idtype=cvips&gifs=yes&ref=no

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